In the semiconductor industry, the minimum feature sizes of microelectronic devices are approaching the deep sub-micron regime to meet the demand for faster, lower power microprocessors and digital circuits. This trend is leading, for example, to imminent replacement of SiO2 and Si-oxynitride (SiOxNy) dielectric materials with high-permittivity dielectric materials (also referred to herein as “high-k” materials), and the use of alternative gate electrode materials to replace the traditional doped polycrystalline silicon (poly-Si) in sub-0.1 μm complementary metal-oxide semiconductor (CMOS) technology. Thus, process development and integration issues are key challenges for new gate stack materials and silicide processing.
Dielectric materials featuring a dielectric constant greater than that of SiO2 (k˜3.9) are commonly referred to as high-k materials. In addition, high-k materials may refer to dielectric materials that are deposited onto substrates (e.g., HfO2, ZrO2) rather than grown on the surface of the substrate (e.g., SiO2, SiOxNy). High-k materials may incorporate metallic silicates or oxides, including Ta2O5 (k˜26), TiO2 (k˜80), ZrO2 (k˜25), Al2O3 (k˜9), HfSiOx (k˜4-25), and HfO2 (k˜25).
Integration of high-k materials into gate stacks can require a dielectric interface layer at the substrate surface to preserve interface state characteristics and to form an interface with good electrical properties between the high-k material and the substrate. However, the presence of an oxide interface layer lowers the overall dielectric constant of the gate stack and, therefore, the oxide interface layer may need to be thin. During plasma processing in the manufacturing of gate stacks, high-k layers are frequently removed in source/drain regions of the substrate, in order to allow silicidation of the source/drain regions, and to reduce the risk of metallic impurities being implanted in the substrate during ion implantation. Due to the nature of high-k materials, aggressive etch processes may be needed to remove the high-k material. These aggressive etch processes, however, can lead to removal of the substrate material itself, which can result in poor device characteristics. Thus, industry efforts have been directed to promptly terminating the etch processing when the high-k layer has been removed from the source/drain regions. While these efforts have led to control of overetching high-k layers, the present inventors have recognized that devices having features formed in high-k materials can still suffer from reliability and/or operational problems.